Material quality is a major factor affecting the performance of many non-silicon semiconductor electronic devices. Poor quality material, such as material containing a high level of defects, decreases device performance and shortens device lifetime. Technology developed by researchers at NASA Glenn Research Center (GRC) limits or eliminates dislocation defects, resulting in the higher quality material necessary for more robust small-area devices, ones with higher performance levels and increased yields. GRC’s technology provides for web growth of silicon carbide (SiC), ideal for use in wide bandgap electronic devices.

Researchers at NASA Glenn Research Center (GRC) have patented a method for growing low-defect heteroepitaxial films on atomically flat single crystal surfaces. These films can be used to fabricate semiconductor devices whose electrical performance and reliability are greatly impacted by the insulator-semiconductor interface, especially its flatness dimension. The patented methodology is based on the discovery that the occurrence of certain crystal defects can be reduced to zero or near zero in a wide range of growth conditions. Using the methodology, growth will occur on atomically flat surfaces, with all crystals having the same rotational orientation. This drastically reduces, if not eliminates, the formation of defects. This methodology is particularly applicable to the production of silicon carbide (SiC), aluminum nitride (AlN), and gallium nitride (GaN). These compounds’ characteristics make them highly advantageous for applications involving high temperatures, high power, high frequency, and/or high radiation operating conditions. The need for electronic devices and optical devices capable of operating under these extreme conditions is the major motivator for this technology.

Researchers at NASA Glenn Research Center (GRC) have patented a Tunable Local Oscillator with low phase noise (high Q) that alleviates bit error rate degradation in communications systems. The Tunable Local Oscillator utilizes a technique that combines the high Q of superconductors with the tunability of ferroelectric films. Use of a ferroelectric film not only allows for adjusting frequencies, it also enables a locked mode of operation that further reduces phase noise. In contrast to other oscillators, the Tunable Local Oscillator allows for operation to at least 60 GHz without the need for frequency multiplication, elimination of which also reduces degradation due to phase noise. The device can also operate at room temperature with conventional conductors and a corresponding reduction in Q value. The Tunable Local Oscillator benefits communications systems, such as high-frequency receivers in satellite and ground terminal devices, where phase noise has become a major concern.

Researchers at NASA Glenn Research Center (GRC) have patented a laser with a rare earth selective emitter and a rare-earth-doped laser rod. Selective emitters have been successfully used in various thermophotovoltaic energy conversion systems and allow thermal energy to be converted into narrow band radiation for pumping the laser rod. This technology improves laser efficiency because the output of the emitter matches the absorption band of the laser. Prior technologies, such as flashlamp and diode laser pumping mechanisms, are not as efficient in converting input energy to radiation needed for absorption by the laser medium.

Researchers at NASA Glenn Research Center (GRC) have patented a method that allows for precision thickness control during lapping and polishing of semiconductor or dielectric wafers. The use of a conducting strip through a recessed area on the back of the wafer serves as a fuse to stop the thinning process at a point determined by the depth of the recess. This method of end-point detection makes it possible to lap and polish wafers to a thinner and more reproducible result (5 microns or less) than other methods. This method provides the ability to continuously monitor wafer lapping and polishing to accurately achieve the desired thickness. GRC’s new technology is applicable for end-point detection during wet or dry etching. The result is the ability to fabricate unique devices on the thin-film wafer, which was not previously practical.

Researchers at NASA Glenn Research Center (GRC) have patented a method for growing low-defect heteroepitaxial films on atomically flat single crystal surfaces. These films can be used to fabricate semiconductor devices whose electrical performance and reliability are greatly impacted by the insulator-semiconductor interface, especially its flatness dimension. The patented methodology is based on the discovery that the occurrence of certain crystal defects can be reduced to zero or near zero in a wide range of growth conditions. Using the methodology, growth will occur on atomically flat surfaces, with all crystals having the same rotational orientation. This drastically reduces, if not eliminates, the formation of defects. This methodology is particularly applicable to the production of silicon carbide (SiC), aluminum nitride (AlN), and gallium nitride (GaN). These compounds’ characteristics make them highly advantageous for applications involving high temperatures, high power, high frequency, and/or high radiation operating conditions. The need for electronic devices and optical devices capable of operating under these extreme conditions is the major motivator for this technology.

Researchers at NASA Glenn Research Center (GRC) have patented a new DC voltage regulator that can reduce (“buck”) or increase (“boost”) voltage input, providing a wider range of output voltages than previous regulators. Dubbed the Series Connected Buck-Boost Regulator (SCBBR), the technology allows the output voltage to be higher or lower than the input voltage—a capability lacking in any single former technology—and also includes a current limiting mode. More specifically, a circuit enhancement in the SCBBR provides a more conventional buck voltage mode that can be regulated down to zero volts. These enhancements provide users with twice the regulation range compared to either a buck or boost regulator standing alone. This increased regulation range expands the array of possible applications for the SCBBR. Furthermore, using the technique of partial power processing, the SCBBR requires switching of only a small fraction of power to reduce or increase the input voltage to the desired output voltage. This significantly reduces the SCBBR’s size, weight, and power loss.

Researchers at NASA Glenn Research Center (GRC) have patented a new DC voltage regulator that can reduce (“buck”) or increase (“boost”) voltage input, providing a wider range of output voltages than previous regulators. Dubbed the Series Connected Buck-Boost Regulator (SCBBR), the technology allows the output voltage to be higher or lower than the input voltage—a capability lacking in any single former technology—and also includes a current limiting mode. More specifically, a circuit enhancement in the SCBBR provides a more conventional buck voltage mode that can be regulated down to zero volts. These enhancements provide users with twice the regulation range compared to either a buck or boost regulator standing alone. This increased regulation range expands the array of possible applications for the SCBBR. Furthermore, using the technique of partial power processing, the SCBBR requires switching of only a small fraction of power to reduce or increase the input voltage to the desired output voltage. This significantly reduces the SCBBR’s size, weight, and power loss.

Researchers at NASA Glenn Research Center (GRC) have patented a method for growing arrays of large-area device-size, atomically flat silicon carbide (SiC) crystal surfaces. The surfaces can be grown together to form a substrate that is particularly suitable for the heteroepitaxial growth of films used for the fabrication of wide-bandgap semiconductor devices that can operate in high-power, high-frequency, high-temperature, and high-radiation environments. Conventional methods for fabrication of substrates for wide-bandgap devices suffer from high structural defect density and relatively rough surfaces that inhibit device performance and degrade the material quality of deposited layers. This new method solves previous area (size) limitations by using the lateral growth of atomically flat SiC mesas to surfaces to yield larger areas of atomically flat surfaces, beneficial for larger, higher quality devices such as high current devices, LEDs, blue lasers, and high-frequency/high-power industrial electronics.

Researchers at NASA Glenn Research Center (GRC) have patented an improved method for the fabrication of silicon carbide (SiC) crystal substrates that minimizes screw dislocation defects. This method also displaces the remaining screw dislocations to predetermined lateral locations on the substrate that will not interfere with the desired epitaxial layer growth and subsequent device fabrication. By having control of the lateral location of the screw dislocations, wide-bandgap semiconductor devices can be reproducibly patterned to avoid performance-degrading crystal defects. Until now, screw dislocation defects were difficult to observe and their location nearly impossible to predict on the silicon wafer, so any device being fabricated could not be patterned or placed to avoid these defects. This method increases the yield, performance, and commercialization potential of SiC semiconductor devices.